mirror of https://go.googlesource.com/go
261 lines
7.1 KiB
ArmAsm
261 lines
7.1 KiB
ArmAsm
// Inferno's libkern/vlop-arm.s
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// https://bitbucket.org/inferno-os/inferno-os/src/master/libkern/vlop-arm.s
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//
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// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
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// Revisions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com). All rights reserved.
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// Portions Copyright 2009 The Go Authors. All rights reserved.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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// THE SOFTWARE.
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#include "go_asm.h"
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#include "go_tls.h"
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#include "funcdata.h"
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#include "textflag.h"
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// func runtime·udiv(n, d uint32) (q, r uint32)
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// compiler knowns the register usage of this function
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// Reference:
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// Sloss, Andrew et. al; ARM System Developer's Guide: Designing and Optimizing System Software
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// Morgan Kaufmann; 1 edition (April 8, 2004), ISBN 978-1558608740
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#define Rq R0 // input d, output q
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#define Rr R1 // input n, output r
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#define Rs R2 // three temporary variables
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#define RM R3
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#define Ra R11
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// Be careful: Ra == R11 will be used by the linker for synthesized instructions.
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// Note: this function does not have a frame.
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TEXT runtime·udiv(SB),NOSPLIT|NOFRAME,$0
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MOVBU internal∕cpu·ARM+const_offsetARMHasIDIVA(SB), Ra
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CMP $0, Ra
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BNE udiv_hardware
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CLZ Rq, Rs // find normalizing shift
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MOVW.S Rq<<Rs, Ra
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MOVW $fast_udiv_tab<>-64(SB), RM
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ADD.NE Ra>>25, RM, Ra // index by most significant 7 bits of divisor
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MOVBU.NE (Ra), Ra
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SUB.S $7, Rs
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RSB $0, Rq, RM // M = -q
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MOVW.PL Ra<<Rs, Rq
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// 1st Newton iteration
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MUL.PL RM, Rq, Ra // a = -q*d
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BMI udiv_by_large_d
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MULAWT Ra, Rq, Rq, Rq // q approx q-(q*q*d>>32)
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TEQ RM->1, RM // check for d=0 or d=1
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// 2nd Newton iteration
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MUL.NE RM, Rq, Ra
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MOVW.NE $0, Rs
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MULAL.NE Rq, Ra, (Rq,Rs)
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BEQ udiv_by_0_or_1
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// q now accurate enough for a remainder r, 0<=r<3*d
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MULLU Rq, Rr, (Rq,Rs) // q = (r * q) >> 32
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ADD RM, Rr, Rr // r = n - d
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MULA RM, Rq, Rr, Rr // r = n - (q+1)*d
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// since 0 <= n-q*d < 3*d; thus -d <= r < 2*d
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CMN RM, Rr // t = r-d
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SUB.CS RM, Rr, Rr // if (t<-d || t>=0) r=r+d
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ADD.CC $1, Rq
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ADD.PL RM<<1, Rr
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ADD.PL $2, Rq
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RET
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// use hardware divider
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udiv_hardware:
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DIVUHW Rq, Rr, Rs
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MUL Rs, Rq, RM
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RSB Rr, RM, Rr
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MOVW Rs, Rq
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RET
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udiv_by_large_d:
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// at this point we know d>=2^(31-6)=2^25
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SUB $4, Ra, Ra
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RSB $0, Rs, Rs
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MOVW Ra>>Rs, Rq
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MULLU Rq, Rr, (Rq,Rs)
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MULA RM, Rq, Rr, Rr
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// q now accurate enough for a remainder r, 0<=r<4*d
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CMN Rr>>1, RM // if(r/2 >= d)
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ADD.CS RM<<1, Rr
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ADD.CS $2, Rq
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CMN Rr, RM
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ADD.CS RM, Rr
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ADD.CS $1, Rq
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RET
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udiv_by_0_or_1:
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// carry set if d==1, carry clear if d==0
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BCC udiv_by_0
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MOVW Rr, Rq
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MOVW $0, Rr
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RET
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udiv_by_0:
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MOVW $runtime·panicdivide(SB), R11
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B (R11)
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// var tab [64]byte
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// tab[0] = 255; for i := 1; i <= 63; i++ { tab[i] = (1<<14)/(64+i) }
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// laid out here as little-endian uint32s
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DATA fast_udiv_tab<>+0x00(SB)/4, $0xf4f8fcff
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DATA fast_udiv_tab<>+0x04(SB)/4, $0xe6eaedf0
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DATA fast_udiv_tab<>+0x08(SB)/4, $0xdadde0e3
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DATA fast_udiv_tab<>+0x0c(SB)/4, $0xcfd2d4d7
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DATA fast_udiv_tab<>+0x10(SB)/4, $0xc5c7cacc
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DATA fast_udiv_tab<>+0x14(SB)/4, $0xbcbec0c3
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DATA fast_udiv_tab<>+0x18(SB)/4, $0xb4b6b8ba
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DATA fast_udiv_tab<>+0x1c(SB)/4, $0xacaeb0b2
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DATA fast_udiv_tab<>+0x20(SB)/4, $0xa5a7a8aa
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DATA fast_udiv_tab<>+0x24(SB)/4, $0x9fa0a2a3
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DATA fast_udiv_tab<>+0x28(SB)/4, $0x999a9c9d
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DATA fast_udiv_tab<>+0x2c(SB)/4, $0x93949697
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DATA fast_udiv_tab<>+0x30(SB)/4, $0x8e8f9092
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DATA fast_udiv_tab<>+0x34(SB)/4, $0x898a8c8d
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DATA fast_udiv_tab<>+0x38(SB)/4, $0x85868788
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DATA fast_udiv_tab<>+0x3c(SB)/4, $0x81828384
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GLOBL fast_udiv_tab<>(SB), RODATA, $64
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// The linker will pass numerator in R8
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#define Rn R8
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// The linker expects the result in RTMP
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#define RTMP R11
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TEXT runtime·_divu(SB), NOSPLIT, $16-0
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// It's not strictly true that there are no local pointers.
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// It could be that the saved registers Rq, Rr, Rs, and Rm
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// contain pointers. However, the only way this can matter
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// is if the stack grows (which it can't, udiv is nosplit)
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// or if a fault happens and more frames are added to
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// the stack due to deferred functions.
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// In the latter case, the stack can grow arbitrarily,
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// and garbage collection can happen, and those
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// operations care about pointers, but in that case
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// the calling frame is dead, and so are the saved
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// registers. So we can claim there are no pointers here.
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NO_LOCAL_POINTERS
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MOVW Rq, 4(R13)
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MOVW Rr, 8(R13)
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MOVW Rs, 12(R13)
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MOVW RM, 16(R13)
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MOVW Rn, Rr /* numerator */
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MOVW g_m(g), Rq
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MOVW m_divmod(Rq), Rq /* denominator */
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BL runtime·udiv(SB)
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MOVW Rq, RTMP
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MOVW 4(R13), Rq
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MOVW 8(R13), Rr
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MOVW 12(R13), Rs
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MOVW 16(R13), RM
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RET
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TEXT runtime·_modu(SB), NOSPLIT, $16-0
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NO_LOCAL_POINTERS
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MOVW Rq, 4(R13)
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MOVW Rr, 8(R13)
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MOVW Rs, 12(R13)
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MOVW RM, 16(R13)
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MOVW Rn, Rr /* numerator */
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MOVW g_m(g), Rq
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MOVW m_divmod(Rq), Rq /* denominator */
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BL runtime·udiv(SB)
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MOVW Rr, RTMP
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MOVW 4(R13), Rq
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MOVW 8(R13), Rr
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MOVW 12(R13), Rs
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MOVW 16(R13), RM
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RET
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TEXT runtime·_div(SB),NOSPLIT,$16-0
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NO_LOCAL_POINTERS
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MOVW Rq, 4(R13)
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MOVW Rr, 8(R13)
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MOVW Rs, 12(R13)
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MOVW RM, 16(R13)
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MOVW Rn, Rr /* numerator */
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MOVW g_m(g), Rq
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MOVW m_divmod(Rq), Rq /* denominator */
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CMP $0, Rr
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BGE d1
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RSB $0, Rr, Rr
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CMP $0, Rq
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BGE d2
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RSB $0, Rq, Rq
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d0:
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BL runtime·udiv(SB) /* none/both neg */
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MOVW Rq, RTMP
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B out1
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d1:
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CMP $0, Rq
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BGE d0
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RSB $0, Rq, Rq
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d2:
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BL runtime·udiv(SB) /* one neg */
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RSB $0, Rq, RTMP
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out1:
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MOVW 4(R13), Rq
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MOVW 8(R13), Rr
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MOVW 12(R13), Rs
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MOVW 16(R13), RM
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RET
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TEXT runtime·_mod(SB),NOSPLIT,$16-0
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NO_LOCAL_POINTERS
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MOVW Rq, 4(R13)
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MOVW Rr, 8(R13)
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MOVW Rs, 12(R13)
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MOVW RM, 16(R13)
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MOVW Rn, Rr /* numerator */
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MOVW g_m(g), Rq
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MOVW m_divmod(Rq), Rq /* denominator */
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CMP $0, Rq
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RSB.LT $0, Rq, Rq
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CMP $0, Rr
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BGE m1
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RSB $0, Rr, Rr
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BL runtime·udiv(SB) /* neg numerator */
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RSB $0, Rr, RTMP
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B out
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m1:
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BL runtime·udiv(SB) /* pos numerator */
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MOVW Rr, RTMP
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out:
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MOVW 4(R13), Rq
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MOVW 8(R13), Rr
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MOVW 12(R13), Rs
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MOVW 16(R13), RM
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RET
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// _mul64by32 and _div64by32 not implemented on arm
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TEXT runtime·_mul64by32(SB), NOSPLIT, $0
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MOVW $0, R0
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MOVW (R0), R1 // crash
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TEXT runtime·_div64by32(SB), NOSPLIT, $0
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MOVW $0, R0
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MOVW (R0), R1 // crash
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