mirror of https://github.com/rust-lang/rust
60 lines
2.1 KiB
Rust
60 lines
2.1 KiB
Rust
//@ revisions:opt3 noopt
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//@[opt3] compile-flags: -Copt-level=3
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//@[noopt] compile-flags: -Cno-prepopulate-passes
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#![crate_type = "lib"]
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#![no_std]
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#![feature(repr_simd, core_intrinsics)]
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use core::intrinsics::simd as intrinsics;
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use core::{mem, ptr};
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// Test codegen for not only "packed" but also "fully aligned" SIMD types, and conversion between
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// them. A repr(packed,simd) type with 3 elements can't exceed its element alignment, whereas the
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// same type as repr(simd) will instead have padding.
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#[repr(simd, packed)]
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#[derive(Copy, Clone)]
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pub struct Simd<T, const N: usize>([T; N]);
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#[repr(simd)]
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#[derive(Copy, Clone)]
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pub struct FullSimd<T, const N: usize>([T; N]);
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// non-powers-of-two have padding and need to be expanded to full vectors
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fn load<T, const N: usize>(v: Simd<T, N>) -> FullSimd<T, N> {
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unsafe {
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let mut tmp = mem::MaybeUninit::<FullSimd<T, N>>::uninit();
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ptr::copy_nonoverlapping(&v as *const _, tmp.as_mut_ptr().cast(), 1);
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tmp.assume_init()
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}
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}
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// CHECK-LABEL: square_packed_full
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// CHECK-SAME: ptr{{[a-z_ ]*}} sret([[RET_TYPE:[^)]+]]) [[RET_ALIGN:align (8|16)]]{{[^%]*}} [[RET_VREG:%[_0-9]*]]
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// CHECK-SAME: ptr{{[a-z_ ]*}} align 4
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#[no_mangle]
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pub fn square_packed_full(x: Simd<f32, 3>) -> FullSimd<f32, 3> {
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// CHECK-NEXT: start
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// noopt: alloca [[RET_TYPE]], [[RET_ALIGN]]
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// CHECK: load <3 x float>
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let x = load(x);
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// CHECK: [[VREG:%[a-z0-9_]+]] = fmul <3 x float>
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// CHECK-NEXT: store <3 x float> [[VREG]], ptr [[RET_VREG]], [[RET_ALIGN]]
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// CHECK-NEXT: ret void
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unsafe { intrinsics::simd_mul(x, x) }
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}
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// CHECK-LABEL: square_packed
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// CHECK-SAME: ptr{{[a-z_ ]*}} sret([[RET_TYPE:[^)]+]]) [[RET_ALIGN:align 4]]{{[^%]*}} [[RET_VREG:%[_0-9]*]]
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// CHECK-SAME: ptr{{[a-z_ ]*}} align 4
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#[no_mangle]
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pub fn square_packed(x: Simd<f32, 3>) -> Simd<f32, 3> {
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// CHECK-NEXT: start
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// CHECK-NEXT: load <3 x float>
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// noopt-NEXT: load <3 x float>
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// CHECK-NEXT: [[VREG:%[a-z0-9_]+]] = fmul <3 x float>
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// CHECK-NEXT: store <3 x float> [[VREG]], ptr [[RET_VREG]], [[RET_ALIGN]]
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// CHECK-NEXT: ret void
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unsafe { intrinsics::simd_mul(x, x) }
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}
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